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	<title>Anasim &#187; grid</title>
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	<link>http://www.anasim.com</link>
	<description>Your Total Power Integrity Team</description>
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		<title>Simulation speed and accuracy</title>
		<link>http://www.anasim.com/pi-fp/simulation-speed-and-accuracy/</link>
		<comments>http://www.anasim.com/pi-fp/simulation-speed-and-accuracy/#comments</comments>
		<pubDate>Sun, 05 Jul 2009 16:11:36 +0000</pubDate>
		<dc:creator>Raj</dc:creator>
				<category><![CDATA[pi-fp]]></category>
		<category><![CDATA[accuracy]]></category>
		<category><![CDATA[complexity]]></category>
		<category><![CDATA[distributed]]></category>
		<category><![CDATA[grid]]></category>
		<category><![CDATA[IR Drop]]></category>
		<category><![CDATA[noise]]></category>
		<category><![CDATA[power]]></category>
		<category><![CDATA[power integrity]]></category>
		<category><![CDATA[resolution]]></category>
		<category><![CDATA[simulation]]></category>
		<category><![CDATA[wave propagation]]></category>

		<guid isPermaLink="false">http://www.anasim.com/?p=142</guid>
		<description><![CDATA[As simulation complexity in the number of elements explodes in the nanoscale regime (sub-100nm), tools face a difficult choice in reducing simulation times, where model accuracy is compromised. Tools employing model simplifications commonly claim 5% SPICE accuracy, or worse, which consumes design margin available for power integrity, and adds uncertainty. Besides, model simplification with large [...]]]></description>
			<content:encoded><![CDATA[<p>As simulation complexity in the number of elements explodes in the nanoscale regime (sub-100nm), tools face a difficult choice in reducing simulation times, where model accuracy is compromised. Tools employing model simplifications commonly claim 5% SPICE accuracy, or worse, which consumes design margin available for power integrity, and adds uncertainty. Besides, model simplification with large numbers of interacting inductors and capacitors is a complex task.</p>
<p>pi-fp, with continuum modeling, and distributed electrical parameters, load, and capacitance modeling, does not compromise simulation accuracy for speed, but reduces simulation resolution instead. By increasing the unit area simulated, from 50u by 50u to 100u by 100u, simulation speed in pi-fp is enhanced by at least a factor of 4, with no loss of grid voltage variation accuracy.</p>
<p>For more information: <a href="http://www.anasim.com/pi-fp-info.pdf"><strong>pi-fp brochure</strong></a></p>
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		<item>
		<title>Grid Noise Simulation Software for Windows(tm)</title>
		<link>http://www.anasim.com/ecd/grid-noise-simulation-software-for-windowstm/</link>
		<comments>http://www.anasim.com/ecd/grid-noise-simulation-software-for-windowstm/#comments</comments>
		<pubDate>Sun, 12 Apr 2009 06:26:19 +0000</pubDate>
		<dc:creator>Raj</dc:creator>
				<category><![CDATA[Effective Current Density]]></category>
		<category><![CDATA[Software]]></category>
		<category><![CDATA[grid]]></category>
		<category><![CDATA[inductance]]></category>
		<category><![CDATA[IR Drop]]></category>
		<category><![CDATA[L*di/dt]]></category>
		<category><![CDATA[noise]]></category>
		<category><![CDATA[power grid]]></category>
		<category><![CDATA[power noise]]></category>
		<category><![CDATA[RLC]]></category>
		<category><![CDATA[rlcsim]]></category>
		<category><![CDATA[simulation]]></category>

		<guid isPermaLink="false">http://www.anasim.com/?p=32</guid>
		<description><![CDATA[RLCSim is a Windows(tm) executable that performs noise analysis on a power grid over a circuit block. This tool, a pre-cursor of pi-fp, considers grid resistance (IR drop), inductance (L*di/dt) or voltage droop, and distributed capacitance that absorbs transients, and displays noise propagation and summing within the block.
Inputs include grid parameters, block power consumption profiles [...]]]></description>
			<content:encoded><![CDATA[<p>RLCSim is a Windows(tm) executable that performs noise analysis on a power grid over a circuit block. This tool, a pre-cursor of pi-fp, considers grid resistance (IR drop), inductance (L*di/dt) or voltage droop, and distributed capacitance that absorbs transients, and displays noise propagation and summing within the block.</p>
<p>Inputs include grid parameters, block power consumption profiles and capacitance.</p>
<p><a href="http://www.anasim.com/wp-content/uploads/2009/04/rlcsim.zip">FREE RLCSim Windows(tm) ZIP Download</a></p>
<p>Shown below is a noise simulation result using RLCSIM demonstrating detrimental effects of lens-shaped on-chip decoupling capacitance structure. Power grid noise from an on-chip source is focused behind the capacitance structure, illustrating distributed <strong>true-electromagnetic simulation capability</strong> absent in other power integrity analysis tools.</p>
<p style="text-align: center;"><a href="http://www.anasim.com/wp-content/uploads/2009/04/cap_lens1.gif"></a><a href="http://www.anasim.com/wp-content/uploads/2009/04/cap_lens_sml.gif"><img class="aligncenter size-full wp-image-94" title="cap_lens_sml" src="http://www.anasim.com/wp-content/uploads/2009/04/cap_lens_sml.gif" alt="cap_lens_sml" width="355" height="254" /></a></p>
<p style="text-align: center;">Download a full-size version of the <a href="http://www.anasim.com/wp-content/uploads/2009/04/cap_lens.gif"><strong>animation here</strong></a></p>
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		</item>
		<item>
		<title>Anasim Power Integrity Aware Methodology</title>
		<link>http://www.anasim.com/methodology/anasim-power-integrity-aware-methodology/</link>
		<comments>http://www.anasim.com/methodology/anasim-power-integrity-aware-methodology/#comments</comments>
		<pubDate>Sat, 11 Apr 2009 16:33:27 +0000</pubDate>
		<dc:creator>Prathik Raj</dc:creator>
				<category><![CDATA[Methodology]]></category>
		<category><![CDATA[Anasim]]></category>
		<category><![CDATA[Design Methodology]]></category>
		<category><![CDATA[effective current density]]></category>
		<category><![CDATA[efficiency]]></category>
		<category><![CDATA[energy]]></category>
		<category><![CDATA[Floorplanning]]></category>
		<category><![CDATA[front end optimization]]></category>
		<category><![CDATA[grid]]></category>
		<category><![CDATA[grid simulation]]></category>
		<category><![CDATA[IC Design]]></category>
		<category><![CDATA[L*di/dt]]></category>
		<category><![CDATA[layout]]></category>
		<category><![CDATA[noise]]></category>
		<category><![CDATA[physical design]]></category>
		<category><![CDATA[power]]></category>
		<category><![CDATA[power aware]]></category>
		<category><![CDATA[power grid]]></category>
		<category><![CDATA[power integrity]]></category>
		<category><![CDATA[power integrity aware]]></category>
		<category><![CDATA[resonance]]></category>
		<category><![CDATA[simulation]]></category>
		<category><![CDATA[Software]]></category>
		<category><![CDATA[technology]]></category>

		<guid isPermaLink="false">http://www.anasim.com/?p=19</guid>
		<description><![CDATA[A power-integrity-aware physical design methodology enables front-end optimization of power grid metal resource usage, decoupling capacitance planning and placement, and significantly relaxes routing constraints.
Click to enlarge image
]]></description>
			<content:encoded><![CDATA[<p>A power-integrity-aware physical design methodology enables front-end optimization of power grid metal resource usage, decoupling capacitance planning and placement, and significantly relaxes routing constraints.</p>
<div id="attachment_72" class="wp-caption aligncenter" style="width: 610px"><a href="http://www.anasim.com/wp-content/uploads/2009/04/flow2.gif"><img class="size-medium wp-image-72" title="PI-FP Physical Design Methodology" src="http://www.anasim.com/wp-content/uploads/2009/04/flow2-600x571.gif" alt="Power-Integrity (PI) aware ULSI design flow" width="600" height="571" /></a><p class="wp-caption-text">Power-Integrity (PI) aware ULSI design flow</p></div>
<p>Click to enlarge image</p>
]]></content:encoded>
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