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ANASIM

COMPLETE SIMULATION THROUGH CONTINUUM MODELS

WELCOME TO ANASIM

Anasim is your Total Power Integrity team. A spin-off from ComLSI's power integrity research, our flagship tool is the power integrity aware floor planner π-fp. Our PI methodology and tool provides you with optimization and 2D dynamic voltage variations beyond any IR Drop tool. And... we solved the IP Core-Chip-System true-electro-magnetic simulation complexity problem!

π-fp: free DEMO Download
and instructions / and DEMO Simulator for Linux.
fast multi-chip simulation based on 'Effective Current Density'
package and board-level power integrity planning

Power Integrity and Energy aware Floor Planner :π-fp

img Simulation results on a chip with two current source loads at two corners of the chip. In the corner to the left, an 'Active Noise Regulator' interacts with on-chip noise to reduce the voltage droop by about 40%. Multiple simulation output views from π-fp have been combined to provide this animated image. π-fp differentiates itself in being able to conduct 'true dynamic' EM simulations on entire power delivery systems, providing floor planners with the ability to conduct rapid 'what-if' analyses.
Power grid noise simulation with Active Noise Regulation
 

π-fp completes power integrity investigations for SoC floor plans including all essential components such as dynamic, distributed on-chip power consumption, distributed on-chip capacitance, grid and package inductances, package capacitors and power delivery connections in minutes. π-fp permits designers' investigations of grid L*di/dt noise, grid noise propagation and summation, and power delivery system resonances.